|
Chao Wang School of Computer Science University of Science and Technology of
China Email: cswang[at]ustc.edu.cn Research
Interests: FPGA, Big Data Accelerators,
Computer Architecture |
Dr. Chao Wang received B.S. and Ph.D. degrees from School of Computer
Science, University of Science and Technology of China, in 2006 and 2011
respectively. He has been a postdoctoral researcher in USTC from 2011 to 2013.
He visited Professor Yuan Xie’s research group in
University of California, Santa Barbara from 2015 to 2016. He also worked with
Infineon Technologies A.G. in 2007-2008. He is the Associate Editor of Applied
Soft Computing, Microprocessors and Microsystems, IET Computers & Digital
Techniques, and International Journal of Electronics. He is now in the CCF Task
Force on Formal methods. He is a member of IEEE, ACM, and senior member of CCF.
Book:
Reconfigurable
and Adaptive Computing: Theory and Applications, published by Chapman and Hall/CRC.
2017 and
Accepted:
[1]. [TPDS]
Chao Wang, Xi
Li, Yunji Chen, Youhui
Zhang, Oliver Diessel, Xuehai
Zhou: Service-oriented
Architecture on FPGA-based MPSoC, IEEE
Transactions on Parallel and Distributed Systems.
[2]. [TCAD]Chao
Wang, Lei Gong,
Qi Yu, Xi Li, Yuan Xie, Xuehai
Zhou, DLAU: A Scalable
Deep Learning Accelerator Unit on FPGA, IEEE Transactions on Computer-Aided Design
of Integrated Circuits and Systems.
[3]. [TSC] Chao Wang, Xi Li, Aili Wang and Xuehai Zhou, A Classroom Scheduling Service for Smart Classes,
IEEE Transactions on Services Computing.
[4]. [TCBB]Chao
Wang, Xi Li,
Dong Dai, Aili Wang, and Xuehai
Zhou, Accelerating
Computation of Large Biological Datasets using MapReduce Framework
IEEE/ACM Transactions on Computational Biology and Bioinformatics.
[5]. [JSS]Chao
Wang, Xi Li, Huizhen Zhang, Aili Wang, and Xuehai Zhou, HOTISE: Hot Spots Profiling and Dataflow Analysis in
Custom Dataflow Computing SoftProcessors, Journal
of Systems and Software.
[6]. [CCGRID]Jinhong Zhou, Chongchong
Xu, Xianglan Chen, Chao Wang and Xuehai Zhou, Mermaid:
Integrating Vertex-Centric with Edge-Centric for Real-World Graph Processing,
17th IEEE/ACM International Symposium on Cluster, Cloud and Grid.
[7]. [CCGRID]J Jinhong Zhou, Shaoli Liu, Qi Guo, Xuda Zhou, Tian Zhi, Daofu Liu, Chao
Wang, Xuehai Zhou, Yunji
Chen and Tianshi Chen, TuNao: A
High-Performance and Energy-Efficient Reconfigurable Accelerator for Graph
Processing, 17th
IEEE/ACM International Symposium on Cluster, Cloud and Grid.
[8]. [DATE]Maohua Zhu, Youwei
Zhuo, Chao
Wang, Wenguang Chen and Yuan Xie,
Performance
Evaluation and Optimization of HBM-Enabled GPU for Data-intensive Applications,
Design, Automation and Test in Europe, 2017.
2016:
[1]. [TPDS] Chao Wang, Xi Li, Junneng Zhang, Aili Wang, Xuehai Zhou: Hardware
Implementation on FPGA for Task-level Parallel Dataflow Execution Engine,
IEEE Transactions on Parallel and Distributed Systems.
[2]. [TVLSI] Qi Guo,
Xi Li, Chao Wang, Xuehai Zhou: Evaluation and Tradeoffs for Out-of-Order Execution on
Reconfigurable Heterogeneous MPSoC. IEEE
Trans. VLSI Syst. 24(1): 79-91
[3].
[ASOC] Chao Wang, Xi Li, Xuehai
Zhou, Aili Wang, Nadia Nedjah:
Soft
computing in big data intelligent transportation systems. Appl. Soft
Computing. 38: 1099-1108.
[4]. [JSA] Beilei
Sun, Xi Li, Bo Wan, Chao Wang, Xuehai Zhou, Xianglan Chen, Definitions of
Predictability for Cyber Physical Systems, Journal of
Systems Architecture.
[5].
[IJPP]Nadia Nedjah,
Luiza de Macedo Mourelle, Chao Wang,
A Parallel
Yet Pipelined Architecture for Efficient Implementation of the Advanced
Encryption Standard Algorithm on Reconfigurable Hardware, International
Journal of Parallel Programming.
[6].
[IJPP]Nadia Nedjah,
Rogério de M. Calazan, Luiza de Macedo Mourelle, Chao Wang, Parallel
Implementations of the Cooperative Particle Swarm Optimization on Many-core and
Multi-core Architectures, International Journal of
Parallel Programming.
[7].
[IJHPSA]Beilei Sun, Xi Li, Chao Wang, Bo Wan and Xuehai Zhou, KUMMS: optimizing DRAM locality with Kernel-user
behaviors, Int. J.
High Performance Systems Architecture.
[8].
[GLSVLSI] Jiachen Song, Xi Li, Beilei Sun, Zhinan Cheng, Chao Wang and Xuehai
Zhou: FCM:
Towards Fine-Grained GPU Power Management for Closed Source Mobile Games,
in GLSVLSI 2016.
[9].
[ASAP] Zhinan
Cheng, Xi Li, Jiachen Song, Beilei
Sun, Xuehai Zhou and Chao Wang: Display Power Reduction for Mobile Closed-Source Games, 27th
Annual IEEE International Conference on Application-specific Systems,
Architectures and Processors.
[10].
[ICWS] Chao Wang, Xi Li, Qi Yu, Aili Wang, Patrick Hung, Xuehai
Zhou: SOLAR:
Services-oriented Learning Architectures, IEEE
International Conference on Web Services.
[11].
[ICWS] Chao Wang, Xi Li, Jinhong
Zhou, Aili Wang, Xuehai
Zhou: FairPlay: Services Migration with Lock-free Mechanisms for Load
Balancing in Cloud Architectures, IEEE International
Conference on Web Services.
[12].
[SPAA] Chao Wang, Xi Li, Aili
Wang and Xuehai Zhou: Brief
Announcement: MIC++: Accelerating Maximal Information Coefficient Calculation
with GPUs and FPGAs, 28th ACM Symposium on
Parallelism in Algorithms and Architectures.
[13].
[ISPA] Shiming
Lei, Chao Wang, Xi Li, Haijie Fang and Xuehai Zhou, SCADIS: A
Scalable Accelerator for Data- Intensive String Set Matching on FPGAs, The
14th IEEE International Symposium on Parallel and Distributed Processing with
Applications.
[14].
[MASCOTS] Zhinan
Cheng, Xi Li, Beilei Sun, Jiachen
Song, Chao Wang and Xuehai Zhou, Behavior-Aware Integrated CPU-GPU Power Management For
Mobile Games, Modeling, Analysis, and Simulation On Computer and
Telecommunication Systems.
[15].
[ICPADS]Yangyang Zhao, Qi Yu, Xuda Zhou, Xuehai Zhou, Chao Wang and Xi Li, PIE: A Pipeline
Energy-efficient Accelerator for Inference Process in Deep Neural Networks, The
22nd IEEE International Conference on Parallel and Distributed Systems
2015:
[1]. [TC]
Chao Wang, Xi
Li, Junneng Zhang, Peng Chen, Yunji
Chen, Xuehai Zhou, Ray C.C. Cheung: Architecture
Support for Task Out-of-order Execution in MPSoCs,
IEEE Transactions on Computers.
[2]. [TCBB]
Chao Wang, Xi
Li, Peng Chen, Xuehai
Zhou, Aili Wang and Hong Yu, “Heterogeneous Cloud Framework for Big Data
Genome Sequencing”, IEEE/ACM Transactions on Computational Biology
and Bioinformatics. Featured Spotlight Paper.
[3]. [TPDS] Shaoli
Liu, Tianshi Chen, Ling Li, Xi Li, Mingzhe Zhang, Chao
Wang, Haibo Meng, Xuehai Zhou, and Yunji Chen, "FreeRider: Non-local Adaptive Network-on-Chip Routing with
Packet-Carried Propagation of Congestion Information", IEEE Transactions on Parallel and Distributed
Systems.
[4]. [JPDC] Chao Wang, Xi Li, Peng Chen, and Xuehai
Zhou, “A Case
Study of Parallel JPEG Encoding on an FPGA,” Journal of Parallel and
Distributed Computing.
[5]. [IJE] Chao Wang, Xi Li, Xuehai Zhou, Nadia Nedjah, Aili Wang, “Codem: A
Software/Hardware Codesign Flow for Embedded
Multicore Systems Supporting Hardware Services”, International
Journal of Electronics.
[6].
[JCST] Chao Wang, Xi Li and Xuehai Zhou, “CRAIS: A
Crossbar based Interconnection Scheme on FPGA for Big Data”, Journal
of Computer Science and Technology.
[7].
[IJHPSA]Huang Wang, Chao Wang, Huaping
Chen: XEMU: a
cross-ISA full-system emulator on multiple processor architectures. IJHPSA
5(4): 228-239 (2015)
[8].
[IJCSE]Jinhong Zhou, Chao Wang, Xi Li, Xuehai Zhou: Fast approximate
hash table using extended counting Bloom filter. IJCSE 11(4):
380-390 (2015)
[9].
[DATE] Chao Wang, Xi Li, Xuehai Zhou, SODA: Software Defined FPGA based Accelerators for Big Data,
Design, Automation and Test in Europe, 2015. Best IP
Paper Nomination.
[10].
[FPGA] Chao Wang, Xi Li, Qi Guo, Peng Chen and Xuehai Zhou, “RapidPath: Accelerating
Constrained Shortest Path Finding in Graphs on FPGA”, FPGA 2015
{Poster}.
[11].
[CCGRID] Qi Yu, Chao Wang, Xiang Ma, Xi Li and Xuehai
Zhou, “A Deep
Learning accelerator based FPGA” 15th IEEE/ACM International
Symposium on Cluster, Cloud and Grid Computing.
[12].
[Cluster] Xiang Ma, Chao Wang, Qi Yu, Xi Li, Xuehai Zhou: An FPGA-Based
Accelerator for Neighborhood-Based Collaborative Filtering Recommendation
Algorithms. CLUSTER 2015: 494-495.
[13].
[ICA3PP] Fahui Jia, Chao Wang, Xi Li, Xuehai
Zhou: SAKMA:
Specialized FPGA-Based Accelerator Architecture for Data-Intensive K-Means
Algorithms. ICA3PP (2) 2015: 106-119
2014:
[1]. [JSA] Chao Wang, Xi Li, Xiaojing Feng, Peng Chen, Xuehai
Zhou，“Colored Petri Net Model with Automatic Parallelization on Real-Time Multicore Architectures”，Journal
of Systems Architecture.
[2]. [TCBB] Peng Chen, Chao Wang, Xi Li, Xuehai
Zhou, “Accelerating
the Next Generation long read mapping with the FPGA-based system”, IEEE/ACM
Transactions on Computational Biology and Bioinformatics.
[3]. [IJES]Zongwei Zhu, Xi Li, Chao
Wang, Xuehai Zhou: Memory power optimisation on low-bit multi-access cross memory address
mapping schema. IJES 6(2/3): 240-249
[4]. [IJHPSA]Junneng Zhang, Chao
Wang, Xi Li, Xuehai Zhou, Aili
Wang, Gangyong Jia, Nadia Nedjah: Amdahl's and Hill-Marty laws revisited for FPGA-based MPSoCs: from theory to practice. IJHPSA 5(2):
115-126
[5]. [ARC]
Chao Wang, Xi Li, Huizhen Zhang, Liang Shi, and Xuehai
Zhou,
“Instruction Extension and Generation for Adaptive Processors”, ARC
2014.
[6]. [FPGA]
Chao Wang, Xi Li, Xuehai Zhou, Yunji Chen, Ray C.C.
Cheung, “Big
Data Genome Sequencing on Zynq based Clusters”, FPGA 2014 {Poster}.
[7]. [FPGA]
Chao Wang, Xi Li, Xuehai Zhou, Yunji Chen, Koen Bertels, “Co-processing with Dynamic Reconfiguration on Heterogeneous MPSoC: Practices and Design Tradeoffs”, FPGA 2014 {Poster}.
[8]. [RTCSA] Peng Chen,
Chao Wang, Xi Li and Xuehai Zhou, “Multi-objective aware design flow for
coarse-grained systems on chip”, RTCSA 2014.
[9]. [RTCSA] Zongwei Zhu, Xi Li, Chao
Wang and Xuehai Zhou, “Memory Power Optimization on Different
Memory Address Mapping Schemas”, RTCSA 2014.
[10]. [ISPA] Xi Li, Beilei Sun, Zongwei Zhu, Chao
Wang and Xuehai Zhou, "Kernel-User Space Separation in DRAM Memory", ISPA 2014.
[11]. [ISIC] Peng Chen, Chao Wang, Xi Li, Xuehai Zhou and Ray C.C. Cheung, Trade-offs between the Sensitivity and the Speed of the FPGA-based
Sequence Aligner, ISIC 2014.
2013:
[1].
[TACO] Chao Wang, Xi Li, Junneng
Zhang, Xuehai Zhou, Xiaoning
Nie. “MP-Tomasulo: a Dependency-aware
Automatic Parallel Execution Engine for Sequential Programs”. ACM
Transactions on Architecture and Code Optimization.
[2]. [SIGBED
Review] Chao Wang,
Xi Li, Xuehai Zhou, “Heterothread: Hybrid Thread Level Parallelism on Heterogeneous Multicore
Architectures”. ACM SIGBED Review.
[3]. [IJHPSA]Aili
Wang, Chao Wang, Xi Li, Xuehai Zhou, Nadia Nedjah: Services-oriented
URL filtering and verification. IJHPSA 4(4): 183-195 (2013)
[4]. [ISCAS] Junneng Zhang, Chao Wang, Xi Li, Xuehai Zhou. “FPGA Implementation of a Scheduler Supporting Parallel Dataflow Execution”, ISCAS 2013.
[5]. [FPGA]
Chao Wang, Xi
Li, Xuehai Zhou, Jim Martin and Ray Cheung. “Genome Sequencing
Using MapReduce on FPGA with Multiple Hardware Accelerators”. FPGA
2013 {Poster}.
[6]. [FPGA]
Chao Wang, Xi
Li, Huizhen Zhang, Jinsong
Ji and Xuehai Zhou. “Custom Instruction Generation and Mapping for
Reconfigurable Instruction Set Processors”. FPGA 2013 {Poster}.
[7]. [FPT]Peng Chen, Chao
Wang, Xi Li, Xuehai Zhou: Hardware acceleration
for the banded Smith-Waterman algorithm with the cycled systolic array. FPT
2013: 480-481
[8]. [HPCC] Chao
Wang, Zhizhong Wu, Aili Wang, Xi Li,
Feng Yang, Xuehai Zhou. SmartMal: A Service-oriented Behavioral Malware
Detection Framework for Smartphones. HPCC 2013.
[9]. [HPCC]
Chao Wang, Xi Li, Aili Wang, Feng Yang, Xuehai
Zhou, An
Intelligent Transportation System using RFID based Sensors, HPCC 2013..
[10]. [HotPower] Gangyong Jia, Xi Li, Jian Wan,
Liang Shi, and Chao Wang, “Coordinate page
allocation and thread group for improving main memory power efficiency”, USENIX HotPower
with SOSP-2013.
[11]. [ICA3PP]
Gangyong Jia, Xi Li, Jian Wan, Chao Wang, Dong Dai, Congfeng Jiang: Coordinate Task and Memory Management for Improving Power
Efficiency. ICA3PP
2013: 267-278
[12].
[FPGA] Peng Chen, Chao Wang, Xi Li, Xuehai Zhou and Jinhong Zhou “Hardware acceleration for long read mapping” FPGA
2013{Poster}.
[13]. [ARC] Qi Guo,
Chao Wang, Xuehai
Zhou and Xi Li,”
Pipeline Optimization for Loops on Reconfigurable Platform”, ARC
2013, 222.
[14]. [ISPA]
Qi Guo, Chao Wang,
Xi Li, Xuehai Zhou. “Static or Dynamic: Trade-offs for Task
Dependency Analysis”. ISPA 2013.
[15]. [ISPA] Qi Guo,
Chao Wang, Xiaojing
Feng, Xuehai Zhou. “Automatic Loop-based
Pipeline Optimization on Reconfigurable Platform”, ISPA
2013
[16]. [TrustCom]Dong Dai, Xi Li, Chao Wang, Junneng Zhang, Xuehai Zhou: Detecting Associations in Large Dataset on MapReduce. TrustCom/ISPA/IUCC 2013: 1788-1794
[17]. [SCC] Aili Wang, Chao Wang, Xi Li and Xuehai Zhou.” SmartClass: A Services-Oriented Approach for University Resource Scheduling”, IEEE SCC 2013.
[18]. [SERVICES]
Aili Wang, Chao Wang, Xi Li and Xuehai Zhou.” SOBA: A
Services-Oriented Browser Architecture with Distributed URL-Filtering
Mechanisms for Teenagers”, Services 2013.
2012:
[1].
[TJS]
Chao Wang, Xi Li, Junneng Zhang, Xuehai Zhou, Aili Wang, “ A Star Network
Approach in Heterogeneous Multi Processors System on Chip”, Journal
of Supercomputing.
[2].
[FPT] Chao Wang, Xi Li, Xuehai
Zhou and Yajun Ha. “Parallel Dataflow Execution for Sequential Programs on
Reconfigurable Hybrid MPSoCs”. FPT
2012.53-56.
[3]. [FPT] Junneng Zhang, Chao Wang, Xi Li, Xuehai Zhou,”A Task-Level OoO Framework for Heterogeneous Systems”, FPT 2012,pp.33-36.
[4]. [FPL] Chao Wang, Xi Li, Peng Chen, Xuehai Zhou. “CaaS: Core as a Service Bring SOA to Reconfigurable MPSoC for High level Parallelization,” FPL 2012.pp.495-498.
[5]. [RAW]
Chao Wang, Peng
Chen, Xi Li, Xiaojing Feng, Xuehai
Zhou. “Detecting
Data Hazards in Multi-Processor System-on-Chips on FPGA “, RAW 2012,
pp.282-287.
[6]. [RAW]
Chao Wang, Peng
Chen, Xi Li, Xiaojing Feng, Xuehai
Zhou. “FPM: A
Flexible Programming Model for MPSoCs “,
RAW 2012 pp. 4770-484.
[7]. [ARC]
Chao Wang, Xi
Li, Xiaojing Feng and Xuehai
Zhou. “An
Approach of Reconfigurable Network of Heterogeneous MPSoC”.
ARC 2012, pp.379-384.
[8].
[ICPADS] Gangyong Jia, Xi Li and Chao Wang,” Behavior Aware Data Locality for Caches”, ICPADS
2012,pp.514-521.
[9]. [Cluster] Chao Wang, Xi Li, Dong Dai,
Gangyong Jia, Xuehai Zhou, “Phase
Detection for Loop-based Programs on Multicore Architectures”, IEEE Cluster 2012.pp.584-587.
[10]. [Cluster] Gangyong Jia, Xi Li, Chao Wang, Xuehai Zhou, Zongwei Zhu. “Cache Promotion Policy using Re-Reference Interval Prediction”. IEEE Cluster 2012. pp. 534-537.
[11].
[Cluster] Gangyong Jia, Xi Li, Chao Wang, Xuehai Zhou, Zongwei Zhu. “Memory Affinity: Balancing Performance,
Power, Thermal and Fairness for Multicore Systems.” IEEE Cluster 2012.pp.605-609.
[12]. [Cluster] Dong Dai, Xi Li, Chao
Wang, and Xuehai Zhou. "Cloud Based Short Read Mapping Service". IEEE Cluster 2012.pp.601-604.
[13]. [Cluster] Dong Dai, Xi Li, Chao
Wang, Mingming Sun, and Xuehai
Zhou. "Sedna:
A Memory Based Key-Value Storage System for Realtime
Processing in Cloud". Cluster
Workshop 2012.
[14]. [Cluster] Gangyong Jia, Xi Li, Chao Wang, Xuehai Zhou, Zongwei Zhu. “DTS:
Using Dynamic Time-slice Scaling to Address the OS Problem Incurred by DVFS”. Cluster Workshop 2012. pp.65-72.
[15]. [ICA3PP] Chunsheng Li, Xuehai
Zhou, Fangling Zeng, Chao Wang, “A Dependency Aware
Task Partitioning and Scheduling Algorithm for HW/SW Codesign
on MPSoCs”. ICA3PP
2012.pp.332-346.
[16]. [MASCOTS] Chao Wang, Xi Li, Peng Chen, Xiaojing Feng, Xuehai Zhou. “Analyzing and Extending Amdahl’s Law in Heterogeneous on-chip Clusters”, MASCOTS 2012.pp.489-491.
[17]. [MASCOTS] Gangyong Jia, Xi Li, Chao
Wang, Xuehai Zhou. “Frequency
Affinity: Analyzing and Maximizing Power Efficiency in Multi-core Systems”, MASCOTS
2012.pp.495-497.
[18]. [SCC]
Chao Wang, Xi
Li, Xuehai Zhou. “Regarding Processors and Reconfigurable IP Cores as
Services”. IEEE SCC 2012. pp.668-669.
2011:
[1]. [SCC]
Chao Wang, Xuehai Zhou, Junneng Zhang, Xiaojing Feng and Xiaoning Nie. “SOMP: Services-Oriented Multi Processors”， IEEE SCC 2011, pp.709-716.
[2]. [ISPA]
Chao Wang, Junneng Zhang, Xuehai Zhou, Xiaojing Feng and Aili Wang, “A Flexible High
Speed Star Network Based on Peer to Peer Links on FPGA”, ISPA 2011,
pp.107-112.
[3]. [ISPA]
Chao Wang, Huizhen Zhang, Xuehai Zhou, Jinsong Ji, "Tool Chain Support with Dynamic Profiling for
RISP", ISPA 2011, pp.155-160.
[1]. PI:
National Natural Science Foundation of China. No. 61202053. “Automatic Parallelization of FPGA based
Multi Processors. “ From 2013.01 to 2015.12.
[2]. PI:
China Computer Federation-Tencent Joint Research
Fund. “FPGA based Accelerator for Deep
Learning “ From
2015.10 to 2016.09.
[3]. PI:
China Computer Federation-Venus Joint Research Fund. “Hardware Accelerator for Intrusion Detection Systems with Neural
Networks “ From
2016.10 to 2017.09.
[4]. PI:
Open Research Fund of State Key Lab of Computer Architecture. “FPGA based Accelerator for Big Data
Applications “ From
2014.11 to 2016.11.
[5]. PI:
Anhui Provincial Natural Science Foundation. “FPGA based Accelerator for Big Graph Processing. “ From 2016.01 to
2017.12.
[6]. PI:
Jiangsu Provincial Natural Science Foundation. No.BK2012194. “Key Techniques of Service-oriented
Reconfigurable MPSoCs.” From 2012.07 to 2015.06.
[7]. PI:
China Postdoctoral Science Foundation. No. BH0110000014. ”Out-of-order Task Execution Schemes of Reconfigurable MPSoCs.” From 2012.09 to 2013.07.
[8]. PI:
Suzhou Frontier Research Plan,”FPGA based Neural
Network Accelerator for Next Generation Genome Sequencing”, From 2016.8 to
2018. 7.
[9]. PI:
Fundamental Research Funds for the Central Universities. “Key Techniques of FPGA Acceleration for Deep Neural Networks” From
2016.01 to 2017.12.
1. Editorship:
s
Handling
Editor: Microprocessors and Microsystems
s
Associate
Editor: Applied Soft Computing
s
Associate
Editor: IET Computers and Digital Techniques (IET CDT).
s
Associate
Editor: International Journal of Electronics.
s
Associate
Editor: International Journal of High Performance Systems Architecture
s
Editor
Board Member: International Journal of Business Process Integration and
Management
s
Guest
Editor: IEEE/ACM Transactions on Computational Biology and Bioinformatics:
Special Issue on Data Processing in Computational Biology and Bioinformatics
s
Guest
Editor: Applied Soft Computing: Special Issue on Soft Computing Applied to
Swarm Robotics
s
Guest
Editor: Neurocomputing: Special Issue on New Trends
for Pattern Recognition: Theory & Applications
s
Guest
Editor: Applied Soft Computing: Special Issue on Soft Computing for Big Data
s
Guest
Editor: International Journal of Parallel Programming: Special Issue on
Sequential Code Parallelization
s
Guest
Editor: International Journal of Electronics: Special Issue on Reconfigurable
and Adaptive Computing
2. Chair
s
Publicity
Chair: Conference on High Performance and Embedded Architectures and Compilers
(HiPEAC 2015)
s
Publicity
Chair: 12th IEEE Symposium on Parallel and Distributed Processing with
Applications (ISPA 2014)
s
Publicity
Chair: International Symposium on Applied Reconfigurable Computing (ARC 2017)
s
Session
Chair: 9th IEEE Symposium on Parallel and Distributed Processing with
Applications (ISPA 2011)
3. Program Committee Member:
s
International
Symposium on Applied Reconfigurable Computing (ARC 2013/2014/2015/2016/2017)
s
International
Conferences on Web Services (ICWS 2017)
s
International
Conference on Services Computing (SCC 2012/2013/2014/2015/2016/2017)
s
Euromicro Conference on Digital System Design (DSD
2015/2016/2017)
s
Design,
Automation & Test in Europe (DATE 2015)
s
IEEE/IFIP
International Conference on Embedded and Ubiquitous Computing (EUC
2012/2013/2015)
s
International
Conference on Field Programmable Logic and Applications (FPL 2012/2013/2014)
s
International
Conference on Field-Programmable Technology (FPT 2013/2014)
s
International
Conf on Algorithms and Architectures for Parallel Processing
(ICA3PP 2012/2013)
s
IEEE
Conference on Parallel and Distributed Systems (ICPADS 2012)
s
IEEE
Symposium on Parallel and Distributed Processing with Applications (ISPA
2012/2013/2014)
s
International
Symposium on MapReduce and Big Data Infrastructure (MR.BDI 2014)
s
Reconfigurable
Architectures Workshop (RAW 2012)
s
International
Conference on Reconfigurable Computing and FPGAs (ReConFig
2012/2013/2014)
s
International
Workshop on Reconfigurable Communication-centric SoC
(ReCoSoC 2012/2013/2014/2015/2016)
s
Computer
Architecture and High Performance Computing (SBAC-PAD 2012)
s
International
Symposium on Integrated Circuits and Systems Design (SBCCI 2014/2015/2016)
4. Reviewer
s
ACM
Transactions on Reconfigurable Technology and Systems (TRETS)
s
ACM
Transactions on Embedded Computing Systems (TECS)
s
IEEE
Transactions on Very Large Scale Integration Systems (TVLSI)
s
IEEE
Transactions on Services Computing (TSC)
s
IEEE
Transactions on Neural Networks and Learning Systems (TNNLS)
s
IEEE/ACM
Transactions on Computational Biology and Bioinformatics (TCBB)
s
IEEE
Transactions on Cloud Computing (TCC)
s
IEEE
Transactions on Big Data (TBD)
s
IEEE
Transactions on Education (TE)
s
IEEE
Network
s
IEEE
Embedded System Letters
s
Journal
of Systems Architecture
s
Journal
of Computer Science and Technology
s
Integration,
The VLSI Journal
s
International
Journal of Parallel Programming
s
Applied
Soft Computing
s
International
Journal of High Performance Computing Applications
s
IET
Computers and Digital Techniques
s
The
Journal of Supercomputing
s
Microprocessors
and Microsystems
s
Microelectronics
Journal
s
Neurocomputing
s
Computers
& Electrical Engineering
s
Frontiers
of Computer Science
s
International
Journal of Reconfigurable Computing
s
International
Journal of Electronics
s
EURASIP
Journal on Embedded Systems
s
Foundation
for Science and Technology, Portugal
s
National
Natural Science Foundation of China
5. Membership
s
IEEE
Member, ACM Member, CCF Senior Member, CCF Task Force on Formal methods.
1.
Principles
of Programming Languages SE05241, in Spring
2017.
2.
Modern
Processor Architecture G430113460 , in Spring 2015, Fall 2013, 2012,
2011.
3.
SOC
Design and Principles, G430113448. in
Spring, 2013